Title: | Design of current-controlled current conveyor stage with systematic current offset reduction |
Authors: | Šotner, Roman Prokop, Roman Jeřábek, Jan Kledrowetz, Vilém Fujcik, Lukáš Dostál, Tomáš |
Citation: | 2015 International Conference on Applied Electronics: Pilsen, 8th – 9th September 2015, Czech Republic, p.225-228. |
Issue Date: | 2015 |
Publisher: | Západočeská univerzita v Plzni |
Document type: | konferenční příspěvek conferenceObject |
URI: | http://hdl.handle.net/11025/35127 |
ISBN: | 978-80-261-0385-1 (Print) 978-80-261-0386-8 (Online) |
ISSN: | 1803-7232 (Print) 1805-9597 (Online) |
Keywords: | tranzistory;systematika;zrcadla;standardy;integrované obvody CMOS;prsty;zpracování signálu |
Keywords in different language: | transistors;systematics;mirrors;standards;CMOS integrated circuits;fingers;signal processing |
Abstract in different language: | This contribution presents modification of current-controlled current conveyor (CCCII) designed in order to reduce the systematic DC current offset of transfer between X and Z terminal and also an example of practical design including practical guideline and recommendations. Simulations in Cadence Spectre simulator with ON Semiconductor/AMIS I2T100 based on 0.7 μm technology CMOS07 were provided for verification of discussed features. |
Rights: | © University of West Bohemia |
Appears in Collections: | Applied Electronics 2015 Applied Electronics 2015 |
Files in This Item:
File | Description | Size | Format | |
---|---|---|---|---|
Sotner.pdf | Plný text | 377,32 kB | Adobe PDF | View/Open |
Please use this identifier to cite or link to this item:
http://hdl.handle.net/11025/35127
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.