Full metadata record
| DC pole | Hodnota | Jazyk |
|---|---|---|
| dc.contributor.author | Obermaier, Johannes | |
| dc.contributor.author | Specht, Robert | |
| dc.contributor.author | Sigl, Georg | |
| dc.contributor.editor | Pinker, Jiří | |
| dc.date.accessioned | 2019-10-16T07:09:58Z | |
| dc.date.available | 2019-10-16T07:09:58Z | |
| dc.date.issued | 2017 | |
| dc.identifier.citation | 2017 International Conference on Applied Electronics: Pilsen, 5th – 6th September 2017, Czech Republic, p.137-142. | en |
| dc.identifier.isbn | 978–80–261–0641–8 (Print) | |
| dc.identifier.isbn | 978–80–261–0642–5 (Online) | |
| dc.identifier.issn | 1803–7232 (Print) | |
| dc.identifier.issn | 1805–9597 (Online) | |
| dc.identifier.uri | http://hdl.handle.net/11025/35427 | |
| dc.format | 6 s. | cs |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en | en |
| dc.publisher | Západočeská univerzita v Plzni | cs |
| dc.rights | © Západočeská univerzita v Plzni | cs |
| dc.subject | střídače | cs |
| dc.subject | hodiny | cs |
| dc.subject | programovatelná hradlová pole | cs |
| dc.subject | prstencové oscilátory | cs |
| dc.subject | logické brány | cs |
| dc.subject | hardware | cs |
| dc.title | Fuzzy-glitch: A practical ring oscillator based clock glitch attack | en |
| dc.type | konferenční příspěvek | cs |
| dc.type | conferenceObject | en |
| dc.rights.access | openAccess | en |
| dc.type.version | publishedVersion | en |
| dc.description.abstract-translated | Clock glitches are useful in hardware security applications, where systems are tested for vulnerabilities emerging from fault attacks. Usually a precisely timed and controlled glitch signal is employed. However, this requires complex generators and deep knowledge about the system under attack. Therefore we present a novel approach on clock glitch fault attacks that replaces the single precise glitch by a fuzzy glitch signal. We propose a compact FPGA design for fuzzy clock glitch generation, that is based on mixing two adjustable ring oscillators of different frequencies. The combination of these oscillators creates a glitch containing random and high frequency signal components. We show on the basis of a practical implementation on a Spartan-3E, that the proposed method is able to generate the desired fuzzy clock glitch. We verified experimentally, that the fuzzy clock glitch succeeds in error injection on an STM32F030, an ARM CORTEX-M0 based microcontroller. Our results demonstrate that the fuzzy glitch is an adequate solution for fault injection | en |
| dc.subject.translated | inverters | en |
| dc.subject.translated | clocks | en |
| dc.subject.translated | field programmable gate arrays | en |
| dc.subject.translated | ring oscillators | en |
| dc.subject.translated | logic gates | en |
| dc.subject.translated | hardware | en |
| dc.type.status | Peer-reviewed | en |
| Vyskytuje se v kolekcích: | Applied Electronics 2017 Applied Electronics 2017 | |
Soubory připojené k záznamu:
| Soubor | Popis | Velikost | Formát | |
|---|---|---|---|---|
| Obermaier.pdf | Plný text | 538,13 kB | Adobe PDF | Zobrazit/otevřít |
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