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DC poleHodnotaJazyk
dc.contributor.authorSandu, Roman
dc.contributor.authorShcherbakov, Alexandr
dc.contributor.editorSkala, Václav
dc.date.accessioned2024-07-21T09:04:17Z-
dc.date.available2024-07-21T09:04:17Z-
dc.date.issued2024-
dc.identifier.citationJournal of WSCG. 2024, vol. 32, no. 1-2, p. 71-78.en
dc.identifier.issn1213 – 6972
dc.identifier.issn1213 – 6980 (CD-ROM)
dc.identifier.issn1213 – 6964 (on-line)
dc.identifier.urihttp://hdl.handle.net/11025/57346
dc.format8 s.cs_CZ
dc.format8 s.cs
dc.format.mimetypeapplication/pdf
dc.language.isoenen
dc.publisherVáclav Skala - UNION Agencycs
dc.rights© Václav Skala - UNION Agencycs_CZ
dc.rights© Václav Skala - UNION Agencyen
dc.subjectvykreslení grafucs
dc.subjectGPUcs
dc.subjectbariéracs
dc.subjectrámečkový grafcs
dc.subjectrender passcs
dc.subjectVulkancs
dc.subjectdx12cs
dc.subjectrenderer založený na dlaždicíchcs
dc.titleGPU Cache Flush Minimization In Render Graph Systemsen
dc.typečlánekcs
dc.typearticleen
dc.rights.accessopenAccessen
dc.type.versionpublishedVersion-
dc.description.abstract-translatedModern graphics APIs expose control over the infamously non-coherent GPU caches to application programmers through the mechanisms of pipeline barriers and render passes. A developer is then asked to group together their GPU computations based on memory access patterns such that cache flushes and invalidations are minimized, but render graph systems enable automation of this process. In this paper, we study the problem of finding an optimal execution order for a frame graph to minimize the amount of render pass breaks, which in turn minimizes cache control operations. We formulate and analyze a novel NP-complete problem MLGP and use it to propose an approach to render pass merging that results in 30% less render pass breaks when compared to previous works.en
dc.subject.translatedframe graphen
dc.subject.translatedrender graphen
dc.subject.translatedGPUen
dc.subject.translatedbarrieren
dc.subject.translatedrender passen
dc.subject.translatedVulkanen
dc.subject.translateddx12en
dc.subject.translatedtile based deferred rendereren
dc.identifier.doihttps://www.doi.org/10.24132/JWSCG.2024.8
dc.type.statusPeer-revieweden
Vyskytuje se v kolekcích:Volume 32, number 1-2 (2024)

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  1. DSpace at University of West Bohemia
  2. Publikace ZČU / UWB Publications
  3. Časopisy ZČU / UWB Journals
  4. Journal of WSCG
  5. Volume 32 (2024)
  6. Volume 32, number 1-2 (2024)