Full metadata record
DC pole | Hodnota | Jazyk |
---|---|---|
dc.contributor.author | Wolfram, Heiko | |
dc.date.accessioned | 2019-09-25T10:45:16Z | - |
dc.date.available | 2019-09-25T10:45:16Z | - |
dc.date.issued | 2015 | |
dc.identifier.citation | 2015 International Conference on Applied Electronics: Pilsen, 8th – 9th September 2015, Czech Republic, p.279-284. | en |
dc.identifier.isbn | 978-80-261-0385-1 (Print) | |
dc.identifier.isbn | 978-80-261-0386-8 (Online) | |
dc.identifier.issn | 1803-7232 (Print) | |
dc.identifier.issn | 1805-9597 (Online) | |
dc.identifier.uri | http://hdl.handle.net/11025/35139 | |
dc.format | 6 s. | cs |
dc.format.mimetype | application/pdf | |
dc.language.iso | en | en |
dc.publisher | Západočeská univerzita v Plzni | cs |
dc.rights | © University of West Bohemia | en |
dc.subject | optimalizace | cs |
dc.subject | kvantizace | cs |
dc.subject | signál | cs |
dc.subject | hluk | cs |
dc.subject | zpracování digitálních signálů | cs |
dc.subject | algoritmy zpracování signálu | cs |
dc.subject | programovatelné hradlové pole | cs |
dc.subject | regulátory | cs |
dc.title | Controller fixed-point optimization with genetic algorithms | en |
dc.type | konferenční příspěvek | cs |
dc.type | conferenceObject | en |
dc.rights.access | openAccess | en |
dc.type.version | publishedVersion | en |
dc.description.abstract-translated | This work describes a way to optimize the controller fixed-point representation in programmable logic devices (eg. FPGA) with genetic algorithms. The optimization uses the error between floating-point and fixed-point representation as well as a quantization noise error model. Thus, both terms allow weighting between the to be expected theoretical and actually occurred simulation error. This task could be automated easily due to the script features of the simulation system. | en |
dc.subject.translated | optimization | en |
dc.subject.translated | quantization | en |
dc.subject.translated | signal | en |
dc.subject.translated | noise | en |
dc.subject.translated | digital signal processing | en |
dc.subject.translated | signal processing algorithms | en |
dc.subject.translated | field programmable gate arrays | en |
dc.subject.translated | regulators | en |
dc.type.status | Peer-reviewed | en |
Vyskytuje se v kolekcích: | Applied Electronics 2015 Applied Electronics 2015 |
Soubory připojené k záznamu:
Soubor | Popis | Velikost | Formát | |
---|---|---|---|---|
Wolfram.pdf | Plný text | 293,35 kB | Adobe PDF | Zobrazit/otevřít |
Použijte tento identifikátor k citaci nebo jako odkaz na tento záznam:
http://hdl.handle.net/11025/35139
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