| Title: | Area-Efficient Analog Operations by Dynamicly-Reconfigured Switched-Capacitor Circuits |
| Authors: | Kobayashi, Fuminori Higuchi, Shintaro Zain, Mohamad Ramli, Azreen Bin |
| Citation: | 2018 International Conference on Applied Electronics: Pilsen, 11th – 12th September 2018, Czech Republic, 77-80. |
| Issue Date: | 2018 |
| Publisher: | Západočeská univerzita v Plzni |
| Document type: | konferenční příspěvek conferenceObject |
| URI: | http://hdl.handle.net/11025/35475 |
| ISBN: | 978–80–261–0721–7 |
| ISSN: | 1803–7232 |
| Keywords: | Cypress PSoC;nestejnoměrné časování |
| Keywords in different language: | Cypress PSoC;nonuniform clocking |
| Abstract in different language: | Together with software on a micro-controller, simple additional hardware can implement electronics with less cost and power. Though analog before digitization, in particular, is effective, it comes with a drawback of larger circuit area. This paper proposes a scheme to shrink area by devising clock waveforms of switched-capacitor devices, through dynamic circuit restructuring. Application to a D/A converter using weighted adder is presented |
| Rights: | © Západočeská univerzita v Plzni |
| Appears in Collections: | Applied Electronics 2018 Applied Electronics 2018 |
Files in This Item:
| File | Description | Size | Format | |
|---|---|---|---|---|
| Kobayashi.pdf | Plný text | 774,8 kB | Adobe PDF | View/Open |
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