Full metadata record
| DC pole | Hodnota | Jazyk |
|---|---|---|
| dc.contributor.author | Maljar, David | |
| dc.contributor.author | Arbet, Daniel | |
| dc.contributor.author | Stopjakova, Viera | |
| dc.contributor.editor | Pinker, Jiří | |
| dc.date.accessioned | 2020-11-05T11:31:04Z | |
| dc.date.available | 2020-11-05T11:31:04Z | |
| dc.date.issued | 2020 | |
| dc.identifier.citation | 2020 International Conference on Applied Electronics: Pilsen, 8th – 9h September 2020, Czech Republic. | en |
| dc.identifier.isbn | 978-80-261-0891-7 (Print) | |
| dc.identifier.isbn | 978-80-261-0892-4 (Online) | |
| dc.identifier.issn | 1803-7232 (Print) | |
| dc.identifier.issn | 1805-9597 (Online) | |
| dc.identifier.uri | http://hdl.handle.net/11025/39910 | |
| dc.format | 4 s. | cs |
| dc.format.mimetype | application/pdf | |
| dc.language.iso | en | en |
| dc.publisher | Západočeská univerzita v Plzni | cs |
| dc.rights | © Západočeská univerzita v Plzni | cs |
| dc.subject | analogový design | cs |
| dc.subject | velmi nízké napětí | cs |
| dc.subject | integrátor spínaných kondenzátorů | cs |
| dc.subject | Sigma-Delta ADC | cs |
| dc.subject | CMOS | cs |
| dc.title | 130 nm CMOS Fully Differential SC Filter for Ultra-Low Voltage ∑-Δ Converter | en |
| dc.type | conferenceObject | en |
| dc.type | konferenční příspěvek | cs |
| dc.rights.access | openAccess | en |
| dc.type.version | publishedVersion | en |
| dc.description.abstract-translated | In this paper design and function of thefully differential (FD) switched-capacitor (SC) integra-tor for ultra-low voltage Sigma-Delta analog to digitalconverter (Σ-∆ADC) are presented. The proposedintegrator was designed for differential input signal andapplicable as a main analog block of ultra-low voltageΣ-∆ADC in standard 130 nm CMOS technology.The main block of proposed integrator is operationaltransconductance amplifier (OTA) based on two-stageRail-to-Rail (RtR) FD operational amplifier (OPAMP)working in sub-threshold regime. The characteristicproperties of this circuit is non-standard OTA topology,using SC common-mode feedback (CMFB) circuit andusing switching T-gates. All of these subcircuits aresupplied by only 0.6 V with achieved gain 24.09 dB andcutoff frequency 165.95 kHz. | en |
| dc.subject.translated | analog design | en |
| dc.subject.translated | ultra-low voltage | en |
| dc.subject.translated | switched-capacitor integrator | en |
| dc.subject.translated | Sigma-Delta ADC | en |
| dc.subject.translated | CMOS | en |
| dc.type.status | Peer-reviewed | en |
| Vyskytuje se v kolekcích: | Applied Electronics 2020 Applied Electronics 2020 | |
Soubory připojené k záznamu:
| Soubor | Popis | Velikost | Formát | |
|---|---|---|---|---|
| 09232802.pdf | Plný text | 1,5 MB | Adobe PDF | Zobrazit/otevřít |
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